Method and Apparatus to Optimize Power Clamping
Number of patents in Portfolio can not be more than 2000
United States of America Patent
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Issued Date -
Aug 15, 2024
app pub date -
Feb 23, 2024
filing date -
Mar 3, 2020
priority date (Note) -
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Abstract
A clamping circuit that may be used to provide efficient and effective voltage clamping in an RF front end. The clamping circuit comprises two series coupled signal path switches and a bypass switch coupled in parallel with the series coupled signal path switches. A diode is coupled from a point between the series coupled signal path switches to a reference potential. In addition, an output selection switch within an RF front end has integrated voltage clamping to more effectively clamp the output voltage from the RF front end. Additional output clamping circuits can be used at various places along a direct gain signal path, along an attenuated gain path and along a bypass path.
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- 15 United States
- 10 France
- 8 Japan
- 7 China
- 5 Korea
- 2 Other
Patent Owner(s)
Patent Owner | Address | |
---|---|---|
PSEMI CORPORATION | 9369 CARROLL PARK DRIVE SAN DIEGO CA 92121 |
International Classification(s)
Inventor(s)
Inventor Name | Address | # of filed Patents | Total Citations |
---|---|---|---|
Bacon, Peter | Derry, US | 63 | 587 |
# of filed Patents : 63 Total Citations : 587 | |||
Jiang, Rong | San Diego, US | 47 | 125 |
# of filed Patents : 47 Total Citations : 125 | |||
Shah, Khushali | San Diego, US | 25 | 21 |
# of filed Patents : 25 Total Citations : 21 |
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