MULTI-LOOP TIME VARYING BOSCH PROCESS FOR 2-DIMENSIONAL SMALL CD HIGH ASPECT RATIO DEEP SILICON TRENCH ETCHING
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United States of America Patent
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Issued Date -
Aug 1, 2024
app pub date -
Jan 30, 2023
filing date -
Jan 30, 2023
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Abstract
A method of forming an integrated circuit includes forming a plurality of openings in a resist layer over a semiconductor substrate and removing portions of a semiconductor surface layer exposed by the openings, thereby forming a plurality of deep trenches. Removing the portions includes performing a first etch loop for a first plurality of repetitions, the first etch loop including a deposition process executed for a first deposition time and an etch process executed for a first etch time. The removing further includes performing a second etch loop for a second plurality of repetitions, the second etch loop including the deposition process executed for a second deposition time and an etch process executed for a second etch time. The second deposition time is at least 10% greater than the first deposition time, and the second etch time is at least 10% greater than the first etch time.
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