SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

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United States of America Patent

APP PUB NO 20240243204A1
SERIAL NO

18522543

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Abstract

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An object is to reduce leakage current and parasitic capacitance of a transistor used for an LSI, a CPU, or a memory. A semiconductor integrated circuit such as an LSI, a CPU, or a memory is manufactured using a thin film transistor in which a channel formation region is formed using an oxide semiconductor which becomes an intrinsic or substantially intrinsic semiconductor by removing impurities which serve as electron donors (donors) from the oxide semiconductor and has larger energy gap than that of a silicon semiconductor, With use of a thin film transistor using a highly purified oxide semiconductor layer with sufficiently reduced hydrogen concentration, a semiconductor device with low power consumption due to leakage current can be realized.

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Patent Owner(s)

Patent OwnerAddress
SEMICONDUCTOR ENERGY LABORATORY CO LTDKANAGAWA KEN 243-0036

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
KOYAMA, Jun Sagamihara, JP 1634 57063
KUWABARA, Hideaki Isehara, JP 320 25720
MIYAKE, Hiroyuki Atsugi, JP 618 12888
NODA, Kosei Atsugi, JP 186 3625
TAKAHASHI, Kei Isehara, JP 407 3896
TOYOTAKA, Kouhei Atsugi, JP 171 2143
TSUBUKU, Masashi Atsugi, JP 324 6207
YAMAZAKI, Shunpei Tokyo, JP 7534 239327

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