TRANSISTOR WITH A BODY AND BACK GATE STRUCTURE IN DIFFERENT MATERIAL LAYERS

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United States of America Patent

APP PUB NO 20240222440A1
SERIAL NO

18089919

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Abstract

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Embodiments described herein may be related to apparatuses, processes, systems, and/or techniques for using layer transfer techniques to bond a silicon layer with a GaN layer, where the silicon layer includes a first portion of a device, for example a transistor, and the GaN layer includes a second portion of the device. Other embodiments may be described and/or claimed.

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Patent Owner(s)

Patent OwnerAddress
INTEL CORPORATION2200 MISSION COLLEGE BOULEVARD SANTA CLARA CA 95054

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
BADER, Samuel James Hillsboro, US 15 6
BAN, Ibrahim Beaverton, US 43 600
RADOSAVLJEVIC, Marko Portland, US 499 5168
THEN, Han Wui Portland, US 319 2268
VORA, Heli Chetanbhai Hillsboro, US 5 0

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