METHOD AND SYSTEM FOR A VACUUM COMPATIBLE ELECTRICAL INTERFACE, ENABLING MICROPROCESSOR DEBUG, AT HIGH SPEED, INSIDE AN ELECTRON BEAM PROBE

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United States of America Patent

APP PUB NO 20240219452A1
SERIAL NO

18090422

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Abstract

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The disclosure is directed to a device interface, system and method for connecting a Tester Interface Unit (TIU) to an automated test equipment that enable data rates of over 1.0 Gbps over scalable high speed cables. The device interface includes at least one flange assembly connecting an electron beam probe (EBP) in a vacuum-controlled environment to an ambient environment, the flange assembly including a vacuum-controlled passthrough environment coupled to the EBP, a plurality of cables coupled to a plurality of connectors within the vacuum-controlled passthrough environment to provide power, control and signal connections to the ambient environment, the plurality cables including plurality of hermetically-sealed printed circuit boards (PCBs) carrying digital high speed signals from the TIU, a plurality of power cables supporting a plurality of power requirements, and a plurality of ATE communication control cables to direct the TIU.

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Patent Owner(s)

Patent OwnerAddress
INTEL CORPORATION2200 MISSION COLLEGE BOULEVARD SANTA CLARA CA 95054

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
BASILE, Joseph Beaverton, US 3 15
BRUMMER, Eric Orangevale, US 3 7
FLEDELL, Evan Portland, US 1 0
FREIER, Joshua Portland, US 2 0
GROSSMAN, Brett Forest Grove, US 2 9
HUENING, Jennifer Hillsboro, US 3 0
JOSHI, Prasoon Hillsboro, US 3 0
KIRSCH, Matthew Hillsboro, US 2 8
NEEB, James Gilbert, US 9 36
NESTING, Robert Forest Grove, US 1 0
PETERSON, Charles Hillsboro, US 6 67
REZAIE, Ashraf Portland, US 1 0
TAN, Ling Hong Simpang Ampat, MY 1 0
TONG, Xianghong Hillsboro, US 8 7
VLASYUK, Vladimir Folsom, US 1 0

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