CONTACT STRUCTURE AND A GATE LINE SLIT AND MERGE METHOD TO FORM THEREOF
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United States of America Patent
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Issued Date -
Jun 20, 2024
app pub date -
May 17, 2023
filing date -
May 17, 2023
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Abstract
Aspects of the disclosure provide a semiconductor device. The semiconductor device includes a substrate and a stack of alternative layers including insulating layers and gate layers that are stacked alternatively over the substrate. The stack of alternative layers includes an array region and a contact region. The semiconductor device includes channel structures disposed through the stack of alternative layers in the array region. Each channel structure forms a stack of transistors in a series configuration with the gate layers being gate terminals of the stack of transistors. The semiconductor device includes contact structures disposed in the contact region.
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