Stochastic Rounding Switched Capacitor Computation Cores Useful for Efficient Deep Learning Inference
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United States of America Patent
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Jun 20, 2024
app pub date -
Dec 20, 2022
filing date -
Dec 20, 2022
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Abstract
An apparatus includes multiple analog to digital converters. Individual analog to digital converters are configured to produce a digital output from an analog input and configured to compute a least significant bit of the digital output by comparing an internal residual voltage for determination of the least significant bit and a residual voltage from another analog to digital converter.
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