REACTIVE SERIAL RESISTANCE REDUCTION FOR MAGNETORESISTIVE RANDOM-ACCESS MEMORY DEVICES
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Jun 13, 2024
app pub date -
Dec 10, 2022
filing date -
Dec 10, 2022
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Abstract
A semiconductor device that includes a substrate, a crystalline bottom electrode layer on an upper side of the semiconductor substrate, a conductive crystalline metal layer above the crystalline bottom electrode layer, and a conductive oxide layer above the conductive crystalline metal layer. The conductive oxide layer has a low resistance. The semiconductor device also includes a magnetic tunnel junction (MTJ) above the conductive crystalline metal layer, the MTJ including a tunnel barrier layer, a free layer on a first side of the tunnel barrier layer and a reference layer on a second side of the tunnel barrier layer opposite the first side.
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