SUBSTRATE FOR SEMICONDUCTOR PACKAGE AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
N/A
Issued Date -
Jun 13, 2024
app pub date -
Jun 9, 2023
filing date -
Dec 9, 2022
priority date (Note) -
Published
status (Latency Note)
Importance
Abstract
A substrate for a semiconductor package includes a semiconductor chip mounting region; a bonding terminal region including at least one bonding terminal; at least one plating line extending across the semiconductor chip mounting region; a plating line prohibition region at an opposite side of the bonding terminal region from the semiconductor chip mounting region; and a plating line removal region that is between the bonding terminal region and the semiconductor chip mounting region and is free of a portion of the plating line so that each of the at least one bonding terminal is electrically isolated.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully