SEMICONDUCTOR MEMORY AND METHOD OF MANUFACTURING THE SAME
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United States of America Patent
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Issued Date -
Jun 6, 2024
app pub date -
Feb 14, 2024
filing date -
Sep 21, 2006
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Abstract
A semiconductor memory includes a plurality of stripe-like active areas formed by stacking, in a direction perpendicular to a substrate, a plurality of layers extending parallel to the substrate, a first gate electrode formed on first side surfaces of the active areas, the first side surfaces being perpendicular to the substrate, a second gate electrode formed on second side surfaces of the active areas, the second side surfaces being perpendicular to the substrate. The layers are patterned in self-alignment with each other, intersections of the active areas and the first gate electrode form a plurality of memory cells, and the plurality of memory cells in an intersecting plane share the first gate electrode.
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