AMPLIFIER WITH OUTPUT HARMONIC TERMINATION AND OUTPUT IMPEDANCE NETWORK
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United States of America Patent
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Issued Date -
May 30, 2024
app pub date -
Feb 16, 2023
filing date -
Nov 30, 2022
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Abstract
An amplifier device may include an amplifier transistor and having harmonic termination circuitry and an output impedance network, such as an output T network, coupled to the output of the amplifier transistor. The amplifier device may be configured as an inverted F class amplifier having an operational frequency range with a center frequency of less than or equal to around 2.6 GHz. The harmonic termination circuitry and output impedance network may be configured to create a short circuit or near short circuit at the amplifier transistor output for third harmonic frequencies of the center frequency of the amplifier transistor and to create an open circuit or near open circuit at the amplifier transistor output for second harmonic frequencies of the center frequency. The output impedance network may be configured to increase the output impedance at the center frequency and reduce signal loss for the amplifier device.
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