INTERCONNECT ARCHITECTURE WITH SILICON INTERPOSER AND EMIB

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United States of America Patent

APP PUB NO 20240145395A1
SERIAL NO

18406018

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Abstract

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Embodiments disclosed herein include electronic packages. In an embodiment, the electronic package comprises, a package substrate, an interposer on the package substrate, a first die cube and a second die cube on the interposer, wherein the interposer includes conductive traces for electrically coupling the first die cube to the second die cube, a die on the package substrate, and an embedded multi-die interconnect bridge (EMIB) in the package substrate, wherein the EMIB electrically couples the interposer to the die.

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Patent Owner(s)

Patent OwnerAddress
INTEL CORP2200 MISSION COLLEGE BOULEVARD MS RNB-4-150 SANTA CLARA CALIFORNIA 95052 95052

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
AGARWAL, Rajat Portland, US 104 1163
DASU, Aravind Milpitas, US 25 239
GUTALA, Ravi San Jose, US 16 415
HOSSAIN, MD Altaf Portland, US 86 190
MAHAJAN, Ravindranath V Chandler, US 80 861
MALLIK, Debendra Chandler, US 195 2441
NALAMALPU, Ankireddy Portland, US 93 134
SANE, Sandeep B Chandler, US 31 110
SANKMAN, Robert Phoenix, US 34 132
SRINIVASAN, Sriram Chandler, US 148 1929
SUBBAREDDY, Dheeraj Portland, US 58 140
VISWANATH, Ram S Phoenix, US 30 403
WEBER, Scott Piedmont, US 53 207

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