METHODS AND SYSTEMS FOR LOW NOISE OPERATION OF ANALOG IN MEMORY COMPUTE MAC ARRAYS

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United States of America Patent

APP PUB NO 20240128978A1
SERIAL NO

18240349

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A matrix multiplication and addition (MAC) operating system is described where different cell currents flowing through different cells in a matrix for different PWM time intervals can be integrated and converted into a numeric value for the cumulative charge. The numeric value of the cumulative charge computed by the ADC is equivalent to MAC operations over multiplicity of cells. The operation is inherently error prone due to parasitic coupling effects from the switching of the memory cells in the array. The presented system minimizes the errors due to parasitic coupling through memory array.

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Patent Owner(s)

Patent OwnerAddress
SARIN VISHALSARATOGA CA

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Kowshik, Vikram Cupertino, US 26 847
Nguyen, Sang T Union City, US 6 54
Saha, Biprangshu Bangalore, IN 4 0
Saha, Sankha Santa Clara, US 2 0
Sarin, Vishal Saratoga, US 183 2300

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