SEMICONDUCTOR TRANSISTOR AND MANUFACTURING METHOD THEREFOR
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United States of America Patent
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Issued Date -
Apr 18, 2024
app pub date -
Dec 24, 2023
filing date -
Dec 15, 2021
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Abstract
Provided are a transistor with low contact resistivity and a manufacturing method therefor. The transistor includes a substrate, a buffer layer, a channel layer and a barrier layer sequentially stacked, an ion implantation region is formed in a source region and a drain region of the barrier layer, and grooves arranged at intervals are formed in the ion implantation region. Ohmic metal is deposited on a surface of the ion implantation region and in each groove, and the ohmic metal is in contact with a bottom and a side wall of each groove. In this solution, the ohmic metal can be not only in contact with the surface of the ion implantation region, but also in contact with the side wall of each of the grooves, thereby increasing a contact area between the ohmic metal and the semiconductor, and thus reducing the ohmic contact resistivity.
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