RECOGNITION SYSTEM AND SRAM CELL THEREOF
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United States of America Patent
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Issued Date -
Apr 18, 2024
app pub date -
Dec 28, 2023
filing date -
Dec 13, 2021
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Abstract
A static random-access memory (SRAM) cell includes a first inverter and a second inverter being cross-coupled; a first access transistor that accesses an output of the first inverter under control of a word line; a second access transistor that accesses an output of the second inverter under control of the word line; a first passage transistor that passes a common-mode voltage, controlled by the output of the first inverter; a second passage transistor that passes an input signal, controlled by the output of the second inverter; and a capacitor switchably coupled to receive the common-mode voltage and the input signal through the first passage transistor and the second passage transistor respectively.
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