MEMORY DEVICES, MODULES AND SYSTEMS HAVING MEMORY DEVICES WITH VARYING PHYSICAL DIMENSIONS, MEMORY FORMATS, AND OPERATIONAL CAPABILITIES
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United States of America Patent
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Issued Date -
Apr 4, 2024
app pub date -
Oct 9, 2023
filing date -
Dec 19, 2018
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Abstract
An apparatus is provided, comprising a plurality of memory devices and a buffering device that permits memory devices with a variety of physical dimensions and memory formats to be used in an industry-standard memory module format. The buffering device includes memory interface circuitry and at least one first-in first-out (FIFO) or multiplexer circuit. The apparatus further comprises a parallel bus connecting the buffering device to the plurality of memory devices. The parallel bus includes a plurality of independent control lines, each coupling the memory interface circuitry to a corresponding subset of a plurality of first subsets of the plurality of memory devices. The parallel bus further includes a plurality of independent data channels, each coupling the at least one FIFO circuit or multiplexer circuit to a corresponding subset of a plurality of second subsets of the plurality of memory devices.
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