COMPUTER IMPLEMENTED METHOD FOR CHECKING CORRECTNESS OF PLC PROGRAM

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United States of America Patent

APP PUB NO 20240103479A1
SERIAL NO

18276650

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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The present invention is related to a method for checking correctness of a PLC program described by functional specifications typically presented as a timing chart. The method comprises: —S1: translating the PLC program into a model, —S2: translating the timing chart and integrating said timing chart into the model, —S3: computing abstract semantics, to infer information eventually missing in the timing chart, —S4: predicating transformation, and deducing properties to be verified, from the model and from predefined PLC formalized instructions, in order to satisfy timing chart verification, —S5: solving and checking whether said properties are always verified, or providing counter-examples, —S6: translating said counter-examples into PLC model errors events initial configurations, —S7: simulating execution, —S8: assembling states and events executions variables values, and —S9: translating back to PLC program.

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Patent Owner(s)

Patent OwnerAddress
MITSUBISHI ELECTRIC CORPORATIONTOKYO

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
COUSINEAU, Denis Rennes, FR 5 13
FAISSOLE, Florian Rennes, FR 2 0
INOUE, Hiroaki Tokyo, JP 220 2885
MENTRE, David Rennes, FR 4 15

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