SEMICONDUCTOR INTEGRATED CIRCUIT AND RECEIVER DEVICE
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United States of America Patent
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Issued Date -
Mar 21, 2024
app pub date -
Jun 13, 2023
filing date -
Sep 13, 2022
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Abstract
According to one embodiment, a semiconductor integrated circuit includes: first and second converters respectively configured to determine first and second bit strings based on first and second clock signals; a circuit. The circuit includes: first, second, and third capacitors; first and second switching elements; and first, second, and third buffers. The first buffer includes an output end coupled to the first capacitor, a first end of the each of the first and second switching elements. The second buffer includes an output end coupled to the second capacitor, a second end of the first switching element, and the first converter. The third buffer includes an output end coupled to the third capacitor, a second end of the second switching element, and the second converter. A reference voltage is supplied to an input end of each of the first, second, and third buffers.
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