DUAL-TRIP POINT DATA SLICER FOR SERIAL DATA DEMODULATION
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United States of America Patent
Stats
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N/A
Issued Date -
Mar 21, 2024
app pub date -
Sep 19, 2022
filing date -
Sep 19, 2022
priority date (Note) -
Published
status (Latency Note)
Importance
Abstract
A circuit can be configured to operate as a dual-trip point data slicer for serial demodulation. The circuit can include an input port configured to receive an input signal. The circuit can further include a first output port electrically coupled to the input port by a first circuit path. The circuit can further include the first circuit path, which can be configured to provide the input signal from the input port to the first output port. The circuit can further include a second output port electrically coupled to the input port by a second circuit path that is parallel to the first circuit path. The circuit can further include the second circuit path, which can be configured to provide a reference signal to the second output port. The reference signal can be based on a delayed version of the input signal.
First Claim
Other Claims data not available