SWITCHED CAPACITOR INTEGRATOR CIRCUIT WITH REFERENCE, OFFSET CANCELLATION AND DIFFERENTIAL TO SINGLE-ENDED CONVERSION
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United States of America Patent
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Issued Date -
Mar 21, 2024
app pub date -
Nov 29, 2023
filing date -
Jun 18, 2019
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Abstract
A dual integrator system comprises two integrators, an output stage, and a switching network. The first and second integrators receive a differential Hall sensor signal and a reference voltage. The first integrator outputs a first integrator signal based on the differential Hall sensor and the reference voltage. The second integrator outputs a second integrator signal based on the differential Hall sensor signal and the reference voltage. The first integrator comprises a first offset cancellation feedback loop, and the second integrator comprises a second offset cancellation feedback loop. The switching network is coupled to the first and second integrators and to the output stage, and alternates which of the first and second integrators is coupled to the output stage. In some embodiments, the first and second integrators each perform a reset operation, a sampling operation, an integration operation, a differential to single-ended conversion operation, and a holding operation.
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