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Abstract

An AD conversion device includes an AD converter that outputs an analog signal as sampling data for every sampling point based on a sampling frequency, a controller, and a storage circuit, the controller includes a buffer memory which temporarily stores the sampling data from the AD converter in time series and from which the sampling data is read out in time series, and a decimation controller, the decimation controller outputs a write-enable signal indicating write-enabled for the selected sampling data in the decimation region and the sampling data in the high-speed sampling region, and outputs decimation bit information indicating whether the sampling data is the sampling data of the decimation region or the sampling data of the high-speed sampling region, and the storage circuit stores the sampling data stored in the buffer memory in association with the decimation bit information, in response to the write-enable signal.

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