ASYMMETRIC PASS THROUGH VOLTAGE FOR REDUCTION OF CELL-TO-CELL INTERFERENCE
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United States of America Patent
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Issued Date -
Feb 29, 2024
app pub date -
Aug 21, 2023
filing date -
Aug 30, 2022
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Abstract
A memory access operation is initiated to read a set of target memory cells of a target wordline of the memory device. During the memory access operation, a read voltage level is caused to be applied to the target wordline. During the memory access operation, a first pass through voltage level is caused to be applied to a first wordline adjacent to the target wordline. During the memory access operation, a second pass through voltage is caused to be applied to a second wordline adjacent to the target wordline, wherein the first pass through voltage level is less than the second pass through voltage level.
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