Semiconductor device system
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United States of America Patent
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Issued Date -
Feb 8, 2024
app pub date -
Aug 4, 2023
filing date -
Aug 5, 2022
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Abstract
A semiconductor device system comprising a central controller and a plurality of hardware nodes. The hardware nodes are interconnected with each other through hard-wired connections which support the transmissions of globally asynchronous continuous-time binary value, CTBV, signals. There is defined a point-to-point(s) communication path between two hardware nodes which are processing nodes, along a sequence of hard-wired connections connected to each other through a switching circuitry. The switching circuitry is controlled by at least one hardware node which are communication node. The switching circuitry selectably connects, based on configuration data, two hard-wired connections in the sequence of hard-wired connections, to permit the transmission of each CTBV signal along the sequence of hard-wired connections. The at least one switching circuitry is latency-deterministic.
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