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Abstract

A semiconductor device with a novel structure is provided. The semiconductor device includes a plurality of memory cells each including a transistor and a capacitor, and capacitors included in adjacent memory cells are provided to overlap with each other. A first capacitor included in a first memory cell is provided so as to partly overlap with a second memory cell adjacent to the first memory cell. A second capacitor included in a second memory cell and the first capacitor are provided over different layers. The second capacitor is provided so as to partly overlap with the first memory cell. The first capacitor and the second capacitor include a region where they overlap with each other. The first and second capacitors include a ferroelectric. The ferroelectric preferably includes hafnium, zirconium, or at least one element selected from Group III-V elements. The transistor preferably includes an oxide semiconductor in a semiconductor layer where a channel is formed.

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First Claim