SEMICONDUCTOR DEVICE COMPRISING A MOSFET HAVING A RESURF REGION AND HIGHER PEAK IMPURITY CONCENTRATION DIFFUSION REGION IN THE RESURF REGION
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United States of America Patent
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Issued Date -
Jan 4, 2024
app pub date -
Sep 12, 2023
filing date -
Dec 25, 2019
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Provided is a semiconductor device including: an N-type diffusion layer being a second region, formed in a surface portion of a P-type diffusion layer being a first region, to function as a RESURF region; an N-type buried diffusion layer being a third region formed in a bottom portion of the second region, close to a high-side circuit; and a MOSFET using the second region as a drift layer. The MOSFET includes a thermal oxide film formed between an N-type diffusion layer being a fourth region serving as a drain region and an N-type diffusion layer being a sixth region serving as a source region, and an N-type diffusion layer being a seventh region formed below the thermal oxide film. The seventh region has an end portion close to a low-side circuit, being closer to the low-side circuit than an end portion of the third region close to the low-side circuit.
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