Sample and hold circuit and related driver circuit
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
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N/A
Issued Date -
Nov 23, 2023
app pub date -
Feb 6, 2023
filing date -
May 19, 2022
priority date (Note) -
Published
status (Latency Note)
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Importance

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Abstract
A sample and hold (S/H) circuit includes an analog-to-digital converter (ADC), a register and a digital-to-analog converter (DAC). The ADC receives an input signal and converts the input signal into a digital code. The register, coupled to the ADC, stores the digital code. The DAC, coupled to the register, converts the digital code into an output signal.
First Claim
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Family

- 15 United States
- 10 France
- 8 Japan
- 7 China
- 5 Korea
- 2 Other
Patent Owner(s)
Patent Owner | Address | |
---|---|---|
NOVATEK MICROELECTRONICS CORP | 2F NO 13 INNOVATION ROAD I SCIENCE-BASED INDUSTRIAL PARK HSINCHU |
International Classification(s)

- 2023 Application Filing Year
- H03M Class
- 1002 Applications Filed
- 379 Patents Issued To-Date
- 37.83 % Issued To-Date
Inventor(s)
Inventor Name | Address | # of filed Patents | Total Citations |
---|---|---|---|
Chang, Yung-Te | Hsinchu County, TW | 2 | 0 |
# of filed Patents : 2 Total Citations : 0 | |||
Chen, Chih-Cheng | Yunlin County, TW | 101 | 354 |
# of filed Patents : 101 Total Citations : 354 | |||
Cheng, Jhih-Siou | New Taipei City, TW | 97 | 116 |
# of filed Patents : 97 Total Citations : 116 | |||
Lin, Jin-Yi | Kaohsiung City, TW | 15 | 13 |
# of filed Patents : 15 Total Citations : 13 |
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Patent Citation Ranking
- 0 Citation Count
- H03M Class
- 0 % this patent is cited more than
- 2 Age
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