Instruction Set Architecture for Neural Network Quantization and Packing

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United States of America Patent

APP PUB NO 20230350678A1
SERIAL NO

17732361

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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This application is directed to using a single instruction to initiate a sequence of computational operations related to a neural network. An electronic device receives a single instruction to apply a neural network operation to a set of M-bit elements stored in one or more input vector registers. In response to the single instruction, the electronic device implements the neural network operation on the set of M-bit elements to generate a set of P-bit elements by obtaining the set of M-bit elements from the one or more input vector registers, quantizing each of the set of M-bit elements from M bits to P bits, and packing the set of P-bit elements into an output vector register. P is smaller than M. In some embodiments, the neural network operation is a quantization operation including at least a multiplication with a quantization factor and an addition with a zero point.

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Patent Owner(s)

Patent OwnerAddress
QUALCOMM INCORPORATED5775 MOREHOUSE DRIVE SAN DIEGO CA 92121

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
BALASUBRAMANIAN, Sundar Rajan Groton, US 6 1
HOFFMAN, Marc Mansfield, US 33 570
JAIN, Mansi Littleton, US 10 10
LEE, James Northborough, US 327 11130
MATHEW, Deepak Acton, US 28 174
SUDARSANAN, Srijesh Waltham, US 7 1
SWEENEY, Gerald Chelmsford, US 16 264

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