MEMORY ARRAY STRUCTURE WITH DYNAMIC DIFFERENTIAL-REFERENCE BASED READOUT SCHEME FOR COMPUTING-IN-MEMORY APPLICATIONS, DYNAMIC DIFFERENTIAL-REFERENCE TIME-TO-DIGITAL CONVERTER FOR COMPUTING-IN-MEMORY APPLICATIONS AND COMPUTING METHOD THEREOF
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United States of America Patent
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Aug 17, 2023
app pub date -
Feb 17, 2022
filing date -
Feb 17, 2022
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Abstract
A dynamic differential-reference time-to-digital converter for computing-in-memory applications is controlled by a bias reference and a predetermined setting parameter, and includes a configurable main-reference selector and a plurality of time-to-digital converters. The configurable main-reference selector is configured to receive a plurality of edge-output signals, select one of the edge-output signals as a main reference and select others of the edge-output signals as a plurality of edge selected signals according to the predetermined setting parameter. One of the time-to-digital converters is configured to compare the bias reference with the main reference to output a bias multiplication-and-accumulation value, and others of the time-to-digital converters are configured to compare the main reference with the edge selected signals to output a plurality of differential multiplication-and-accumulation values. The bias multiplication-and-accumulation value and the differential multiplication-and-accumulation values are dynamically adjusted according to the bias reference and the predetermined setting parameter.
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