METHOD FOR MANUFACTURING AN INTEGRATED CIRCUIT
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United States of America Patent
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Issued Date -
Mar 9, 2023
app pub date -
Sep 1, 2022
filing date -
Sep 2, 2021
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Abstract
A method for manufacturing an integrated circuit, includes providing a stack including a substrate and a dielectric layer disposed on the substrate, the substrate being formed from a semiconductor material having a resistivity greater than or equal to 500 Ω.cm, etching trenches extending through the dielectric layer and opening onto the substrate; etching the substrate isotropically and selectively with respect to the dielectric layer to form first cavities in the substrate; depositing a mobile electrical charge-trapping layer on the walls of the first cavities and on the side walls of the trenches so as to fill in the trenches in the dielectric layer, thus closing the first cavities in the substrate; and forming passive components vertically with respect to the first cavities.
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