Integrated Circuit
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United States of America Patent
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Issued Date -
Feb 16, 2023
app pub date -
Oct 28, 2022
filing date -
Oct 28, 2022
priority date (Note) -
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Abstract
This application provides an integrated circuit, including a first MOS transistor. A first effective gate and a second effective gate are disposed in the first MOS transistor, and a first redundant gate is disposed between the first effective gate and the second effective gate. The first effective gate, the second effective gate, and the first redundant gate cover a plurality of fins arranged in parallel. The first effective gate and the second effective gate are connected to a gate terminal of the first MOS transistor. Fins on both sides of the first effective gate and fins on both sides of the second effective gate are respectively connected to a source terminal and a drain terminal of the first MOS transistor. The first redundant gate is connected to a redundant potential or suspended.
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