ESD PROTECTION CIRCUIT
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United States of America Patent
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Issued Date -
Dec 29, 2022
app pub date -
Apr 25, 2022
filing date -
Apr 25, 2022
priority date (Note) -
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status (Latency Note)
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Abstract
The present invention provides an ESD protection circuit including a control circuit, a first transistor, a filter and a second transistor. The control circuit is configured to detect a level of a supply voltage to generate a control signal. The first transistor is coupled between the supply voltage and a ground voltage, and is used to refer to the control signal to determine whether to be enabled as a discharging path for the supply voltage to discharge current to the ground voltage. The filter is configured to filter the control signal to generate a filtered control signal. The second transistor is coupled between the supply voltage and the ground voltage, and is used to refer to the filtered control signal to determine whether to be enabled as a discharging path for the supply voltage to discharge current to the ground voltage.
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