Testing Circuitry And Methods For Analog Neural Memory In Artificial Neural Network

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United States of America Patent

APP PUB NO 20220405564A1
SERIAL NO

17893075

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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Testing circuitry and methods are disclosed for use with analog neural memory in deep learning artificial neural networks. In one example, a method comprises programming a plurality of analog neural non-volatile memory cells in an array of analog neural non-volatile memory cells to store one of N different values, where N is a number of different levels that can be stored in any of the analog neural non-volatile memory cells; measuring a current drawn by the plurality of analog neural non-volatile memory cells; comparing the measured current to a target value; and identifying the plurality of the analog neural non-volatile memory cells as bad if the difference between the measured value and the target value exceeds a threshold.

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Patent Owner(s)

Patent OwnerAddress
SILICON STORAGE TECHNOLOGY INC450 HOLGER WAY SAN JOSE CA 95134

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Do, Nhan Saratoga, US 220 1249
Hong, Stanley San Jose, US 98 237
Lemke, Steven Boulder Creek, US 53 187
Ly, Anh San Jose, US 128 620
Nguyen, Nha San Jose, US 7 10
Tiwari, Vipin Dublin, US 112 596
Tran, Hieu Van San Jose, US 354 3483
Trinh, Stephen San Jose, US 62 144
Vu, Thuan San Jose, US 117 299

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