Testing Circuitry And Methods For Analog Neural Memory In Artificial Neural Network

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United States of America Patent

APP PUB NO 20220398444A1
SERIAL NO

17893071

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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Testing circuitry and methods are disclosed for use with analog neural memory in deep learning artificial neural networks. In one example, a method comprises programming an analog neural non-volatile memory cell in an array to a target value representing one of N different values, where N is an integer; verifying that a value stored in the analog neural non-volatile memory cell is within an acceptable window of values around the target value; repeating the programming and verifying for each of the N values; and identifying the analog neural non-volatile memory cell as bad if any of the verifying indicates a value stored in the cell outside of the acceptable window of values around the target value.

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Patent Owner(s)

Patent OwnerAddress
SILICON STORAGE TECHNOLOGY INC450 HOLGER WAY SAN JOSE CA 95134

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
DO, Nhan Saratoga, US 220 1249
HONG, Stanley San Jose, US 98 237
LEMKE, Steven Boulder Creek, US 53 187
LY, Anh San Jose, US 128 620
NGUYEN, Nha San Jose, US 7 10
TIWARI, Vipin Dublin, US 112 596
TRAN, Hieu Van San Jose, US 354 3483
TRINH, Stephen San Jose, US 62 144
VU, Thuan San Jose, US 117 299

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