Semiconductor device having a planar III-N semiconductor layer and fabrication method
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United States of America Patent
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Jan 2, 2024
Grant Date -
Dec 8, 2022
app pub date -
Jun 20, 2022
filing date -
Oct 5, 2017
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Abstract
A semiconductor device having a planar III-N semiconductor layer includes a substrate including a wafer and a buffer layer of a buffer material different from a material of the wafer, the buffer layer having a growth surface, an array of nanostructures epitaxially grown from the growth surface, a continuous planar layer formed by coalescence of upper parts of the nanostructures at an elevated temperature T, where the number of lattice cells spanning a center distance between adjacent nanostructures are different at the growth surface and at the coalesced planar layer, and a growth layer epitaxially grown on the planar layer.
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