NANOSHEET FIELD EFFECT TRANSISTORS WITH PARTIAL INSIDE SPACERS

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United States of America Patent

APP PUB NO 20220320316A1
SERIAL NO

17726766

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A method of forming a nanosheet device, including forming a channel stack on a substrate, where the channel stack includes at least one nanosheet channel layer and at least one sacrificial release layer, forming a stack cover layer on at least a portion of the channel stack, forming a dummy gate on at least a portion of the stack cover layer, wherein at least a portion of the at least one nanosheet channel layer and at least one sacrificial release layer is exposed on opposite sides of the dummy gate, removing at least a portion of the at least one sacrificial release layer on each side of the dummy gate to form a sacrificial supporting rib, and forming an inner spacer layer on exposed portions of the at least one nanosheet channel layer and at least one sacrificial supporting rib.

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Patent Owner(s)

Patent OwnerAddress
ADEIA SEMICONDUCTOR SOLUTIONS LLC3025 ORCHARD PARKWAY SAN JOSE CA 95134

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Guillorn, Michael A Cold Springs, US 268 5507
Hook, Terence B Jericho, US 213 1832
Robison, Robert R Colchester, US 96 698
Vega, Reinaldo A Mahopac, US 91 1333
Venigalla, Rajasekhar Hopewell Junction, US 92 1057

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