TIME TRACKING CIRCUIT FOR FRAM
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United States of America Patent
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Issued Date -
Sep 8, 2022
app pub date -
May 24, 2022
filing date -
Mar 1, 2016
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Abstract
An example memory circuit for reading and/or writing FRAM memory includes a controller to output a signal to an input of a driver; a transistor coupled an output of the driver; the driver to, in response to receiving the signal, output a first voltage to the transistor; and the transistor to, in response to receiving the first voltage, output a second voltage to a bit cell after a transistor delay, the transistor selected based on a size of the memory circuit.
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