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Abstract

An analog multiplication circuit includes switched capacitors to multiply digital operands in an analog representation and output a digital result with an analog-to-digital convertor. The capacitors are arranged with a capacitance according to the respective value of the digital bit inputs. To perform the multiplication, the capacitors are selectively charged according to the first operand of the multiplication. The capacitors are then connected to a common interconnect for charge sharing across the capacitors, averaging the charge according to the charge determined by the first operand. The capacitor are then maintained or discharged according to a second operand, such that the remaining charge represents a number of “copies” of the averaged charge. The capacitors are then averaged and output for conversion by an analog-to-digital convertor. This circuit may be repeated to construct a multiply-and-accumulate circuit by combining charges from several such multiplication circuits.

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First Claim