SYSTEM AND METHOD FOR PROCESSING BOOLEAN AND GARBLED CIRCUITS IN MEMORY-LIMITED ENVIRONMENTS
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United States of America Patent
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Jun 2, 2022
app pub date -
Nov 29, 2021
filing date -
Nov 29, 2021
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Abstract
A system and method for processing garbled circuit techniques in memory-limited environments. The method includes: initializing a plurality of input gates and a plurality of state gates; generating a circuit slice for an update function; setting the plurality of state gates as a plurality of new output-state-gates; and generating a circuit slice for a finalization function, wherein the finalization function represented by a sub-circuit, the outputs of which are terminal gates.
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