System and method for controlling time dilation in time-sensitive networks
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United States of America Patent
Stats
-
Jan 2, 2024
Grant Date -
Aug 19, 2021
app pub date -
Dec 22, 2020
filing date -
Oct 23, 2017
priority date (Note) -
In Force
status (Latency Note)
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Abstract
A system and method determine a clock drift and a clock variance of each node in plural nodes of a time-sensitive Ethernet network. An accumulated clock offset along a time-sensitive network path in the time-sensitive network is determined based on the clock drifts and the clock variances. A guard band having a dynamic size is determined based on the accumulated clock offset. The times at which Ethernet frames are communicated through the nodes are restricted by communicating the guard band with the dynamic size to one or more of the nodes.
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International Classification(s)
- 2020 Application Filing Year
- H04L Class
- 35369 Applications Filed
- 24782 Patents Issued To-Date
- 70.07 % Issued To-Date
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- 0 Citation Count
- H04L Class
- 0 % this patent is cited more than
- 1 Age
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