MEMORY SYSTEM AND OPERATING METHOD THEREOF

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United States of America Patent

APP PUB NO 20210042233A1
SERIAL NO

16802833

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Abstract

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A memory system includes: a memory device; a host interface suitable for receiving write commands and queueing the received write commands in an interface queue; a workload manager suitable for detecting, in a cache program mode, a mixed workload when a read count is greater than a first threshold value, the read count representing a number of read commands queued in the interface queue and the mixed workload representing receipt of a mix of read and write commands; a mode manager suitable for switching from the cache program mode to a normal program mode when the mixed workload is detected; and a processor suitable for processing write commands queued in a command queue in the cache program mode and processing write commands queued in the interface queue in the normal program mode when the mixed workload is detected.

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Patent Owner(s)

Patent OwnerAddress
SK HYNIX INCGYEONGGI DO SOUTH KOREA GYEONGGI-DO

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
JUNG, Hoe-Seung Seoul, KR 5 14
LEE, Joo-Young Seoul, KR 104 673

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