HERMETIC BARRIER FOR SEMICONDUCTOR DEVICE
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United States of America Patent
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Issued Date -
Dec 3, 2020
app pub date -
Jun 3, 2019
filing date -
Jun 3, 2019
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Abstract
A barrier or “crackstop” that is configured to conduct electrical signals. These configurations may form a wall around integrated, active circuitry of a semiconductor die. This wall may include a conductor that follows a three-dimensional pathway from one side to the other side of the wall. This pathway may have sections that overlap, or double-back, so that portions of the conductor overlap along their individual length. These sections prevent crack propagation internal to the wall.
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