COINTEGRATION OF GALLIUM NITRIDE AND SILICON

Number of patents in Portfolio can not be more than 2000

United States of America Patent

APP PUB NO 20200328108A1
SERIAL NO

16844845

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Abstract

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The disclosed technology relates generally to the field of semiconductor devices, and more particularly to co-integration of GaN-based devices with Si-based devices. In one aspect, a method of forming a semiconductor device includes forming a first wafer including, on a front side thereof, a III-V semiconductor layer stack formed on a first substrate and a first bonding layer. The III-V semiconductor layer stack includes a GaN-based device layer structure formed on the first substrate. The method additionally includes, subsequent to forming the first wafer, bonding the first bonding layer to a second bonding layer of a second wafer. The second wafer includes a second silicon substrate supporting an active device layer, a back-end-of-line interconnect structure and the second bonding layer. The method further comprises, subsequent to bonding, thinning the first wafer from a backside, wherein thinning includes removing at least the first substrate. In another aspect, a semiconductor device includes a cointegrated N-polar HEMT.

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Patent Owner(s)

Patent OwnerAddress
IMEC VZW3001 LEUVEN

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Collaert, Nadine Blanden, BE 24 417
Waldron, Niamh Heverlee, BE 14 70
Walke, Amey Mahadev Heverlee, BE 16 42
Zhao, Ming Bertem, BE 290 4711

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