CONSTRUCTION OF STAGING TREES ON FULLY HIERARCHICAL VLSI CIRCUIT DESIGNS
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
N/A
Issued Date -
Jul 2, 2020
app pub date -
Jan 2, 2019
filing date -
Jan 2, 2019
priority date (Note) -
Published
status (Latency Note)
Importance
Abstract
Embodiments of the invention include method, systems and computer program products for creating a circuit design using a generated tree. The computer-implemented method includes receiving, by one or more processors, a design area for a microelectronic device, wherein the design area includes a plurality of sub-units, each sub-unit from the plurality of sub-units capable of receiving a control signal. The processor determines a location of a source and one or more sinks within the design area. The processor further calculates a center of gravity (COG) based on the location of the one or more sinks. The processor connects the COG to each of the one or more sinks. The processor further connects the COG to the source.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully