AUTOMATED TEST EQUIPMENT (ATE) SUPPORT FRAMEWORK FOR SOLID STATE DEVICE (SSD) ODD SECTOR SIZES AND PROTECTION MODES
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United States of America Patent
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Issued Date -
Jun 25, 2020
app pub date -
Dec 20, 2018
filing date -
Dec 20, 2018
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An automated test equipment (ATE) apparatus comprises a computer system comprising a system controller, wherein the system controller is communicatively coupled to a tester processor and an FPGA. The tester processor is operable to generate commands and data from instructions received from the system controller for coordinating testing of a device under test (DUT), wherein the DUT supports a plurality of non-standard sector sizes and a plurality of protection modes. The FPGA is communicatively coupled to the tester processor, wherein the FPGA comprises at least one hardware accelerator circuit operable to internally generate commands and data transparently from the tester processor for testing the DUT, and wherein the at least one hardware accelerator circuit is able to perform computations to calculate protection information associated with the plurality of protection modes and to generate repeatable test patterns sized to fit each of the plurality of non-standard sector sizes.
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