REVERSED BIAS COMPENSATION FOR SENSE AMPLIFIER OPERATION
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United States of America
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Mar 26, 2020
app pub date -
Oct 21, 2019
filing date -
Oct 21, 2019
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Abstract
Memory devices may employ flip-flops with paired transistors in sense amplifying circuitry to sense charges stored in memory cells. Paired transistors may present mismatches in electrical characteristics, which may affect the sensitivity of the sense amplifying circuitry. Embodiments include systems and methods that compensate and/or mitigate mismatches in the electrical characteristics of the paired transistors. To that end, the memory devices may sense the mismatches during a compensation period and pre-compensate the read-out of data lines to improve the sensibility of the sense amplifying circuitry.
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