INTEGRATED CIRCUIT FOR CONVOLUTION CALCULATION IN DEEP NEURAL NETWORK AND METHOD THEREOF
Number of patents in Portfolio can not be more than 2000
United States of America
Stats
-
N/A
Issued Date -
Mar 19, 2020
app pub date -
Sep 17, 2019
filing date -
Sep 17, 2019
priority date (Note) -
Published
status (Latency Note)
Importance
Abstract
An integrated circuit applied in a deep neural network is disclosed. The integrated circuit comprises at least one processor, a first internal memory, a second internal memory, at least one MAC circuit, a compressor and a decompressor. The processor performs a cuboid convolution over decompression data for each cuboid of an input image fed to any one of multiple convolution layers. The MAC circuit performs multiplication and accumulation operations associated with the cuboid convolution to output a convoluted cuboid. The compressor compresses the convoluted cuboid into one compressed segment and store it in the second internal memory. The decompressor decompresses data from the second internal memory segment by segment to store the decompression data in the first internal memory. The input image is horizontally divided into multiple cuboids with an overlap of at least one row for each channel between any two adjacent cuboids.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully