SYSTEMS, METHODS, AND APPARATUS FOR MEMORY CELLS WITH COMMON SOURCE LINES

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United States of America Patent

APP PUB NO 20190318785A1
SERIAL NO

16244352

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Abstract

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A method for operating a memory device includes the steps of providing a first voltage to a first transistor of a first memory cell and a third transistor of a second memory cell, providing a second voltage to a gate of a second transistor of the first memory cell and a gate of a fourth transistor of the second memory cell, and providing a third voltage to a gate of the first transistor of the first memory cell and a gate of the third transistor of the second memory cell. Other embodiments are also described.

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Patent Owner(s)

Patent OwnerAddress
LONGITUDE FLASH MEMORY SOLUTIONS LTDBRACKEN ROAD SANDYFORD FIRST FLOOR BLACKTHORN EXCHANGE DUBLIN D18 P3Y9

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Hinh, Long T San Jose, US 5 10
Jin, Bo Cupertino, US 95 654
Kouznetsov, Igor G San Francisco, US 32 833
Prabhakar, Venkatraman Pleasanton, US 68 525
Yu, Xiaojun Shanghai, CN 74 1789

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