PROGRAMMABLE TRIM FILTER FOR SUCCESSIVE APPROXIMATION REGISTER ANALOG TO DIGITAL CONVERTER COMPARATOR
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United States of America Patent
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Issued Date -
Jul 11, 2019
app pub date -
Mar 19, 2019
filing date -
Dec 23, 2016
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Abstract
The disclosure includes a successive approximation register (SAR) analog to digital converter (ADC). The SAR ADC includes a sampling network to store a sample of an analog signal. The SAR ADC also includes a comparator to successively compare the sample to reference values to determine a digital value corresponding to the sample of the analog signal. The comparator employs a plurality of comparator preamplifiers. The comparator also includes a programmable trim filter. The programmable trim filter is selectively set to adjust a bandwidth of the comparator preamplifiers to a bandwidth value corresponding with a preamplifier settling time subceeding a preamplifier settling threshold.
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