Low power oscillator using flipped-gate MOS

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United States of America Patent

PATENT NO 10720885
APP PUB NO 20190044478A1
SERIAL NO

15668858

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Abstract

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Relax oscillation circuits have at least one comparison circuit that is structured with a flipped gate transistor and a normal MOS transistor wherein the two transistors having different threshold voltages. The relaxation oscillators are configured for charging and discharging capacitances between the threshold voltages of the flipped gate transistor and the normal MOS transistor by toggling the state of a latching circuit to control the charging and discharging of the capacitances.

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Patent Owner(s)

Patent OwnerAddress
DIALOG SEMICONDUCTOR (UK) LIMITEDTOWER BRIDGE HOUSE ST KATHARINE'S WAY LONDON E1W 1AA

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Kobayashi, Daisuke Tokyo, JP 334 1541
Tyrrell, Julian Swindon, GB 31 200

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