Current steering digital to analog converter with decoder free quad switching
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United States of America Patent
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Dec 4, 2018
Grant Date -
Nov 22, 2018
app pub date -
May 19, 2017
filing date -
May 19, 2017
priority date (Note) -
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status (Latency Note)
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Abstract
Disclosed herein is a digital to analog converter including a first dynamic latch receiving a data signal and an inverse of the data signal. The first dynamic latch is clocked by a clock signal and configured to generate first and second quad switching control signals as a function of the data signal and the inverse of the data signal. A second dynamic latch receives the data signal and the inverse of the data signal, is clocked by an inverse of the clock signal, and is configured to generate third and fourth quad switching control signals as a function of the data signal and the inverse of the data signal. A quad switching bit cell is configured to generate an analog representation of the data signal as a function of the first, second, third, and fourth quad switching signals.
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